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shenzhen lize electronic technology co., ltd da te: 13 , apr . 20 10 version: 2 . 0 page: 1 of 16 shenzhen shenzhen shenzhen shenzhen lize lize lize lize electronic electronic electronic electronic technology technology technology technology co., co., co., co., ltd ltd ltd ltd specification specification specification specification specification specification specification specification L24C02B L24C02B L24C02B L24C02B /l24c04 /l24c04 /l24c04 /l24c04 / / / / l24c08b l24c08b l24c08b l24c08b /l24c16 /l24c16 /l24c16 /l24c16 version version version version 2 2 2 2 . . . . 0 0 0 0 reserves the right to change this documentation without prior notice . www.datasheet.co.kr datasheet pdf - http://www..net/
t el :86-755-8835 3502/03/04 f ax :86-755-8835 3509 website:http://www.lizhiic.com shenzhen lize electronic technology co., ltd date: 1 5 , apr . 20 10 version: 2 . 0 page: 2 of 1 6 features features features features wide voltage operation - vcc = 1.8v to 5.5v operating ambient temperature: -40 to +85 internally organized: - L24C02B , 256 x 8 (2k bits) - l24c04, 512 x 8 (4k bits) - l24c08b , 1024 x 8 (8k bits) - l24c16, 2048 x 8 (16k bits) two-wire serial interface schmitt trigger, filtered inputs for noise suppression bidirectional data transfer protocol 1 mhz (5v), 400 khz (1.8v, 2.5v, 2.7v) compatibility write protect pin for hardware data protection 8-byte page (2k), 16-byte page (4k, 8k, 16k) write modes partial page writes allowed self-timed write cycle (5 ms max) high-reliability - endurance: 1 million write cycles - data retention: 100 years 8-lead pdip, 8-lead sop and 8-lead tssop packages die sales: wafer form, waffle pack general general general general description description description description the L24C02B /l24c04/ l24c08b /l24c16 provides 2048/4096/8192/16384 bits of serial electrically erasable and programmable read-only memory (eeprom) organized as 256/512/1024/2048 words of 8 bits each. the device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation s are essential. the L24C02B /l24c04/ l24c08b /l24c16 is available in space-saving 8-lead pdip, 8-lead sop, and 8-lead tssop packages and is accessed via a two-wire serial interface. pin pin pin pin configuration configuration configuration configuration www.datasheet.co.kr datasheet pdf - http://www..net/
t el :86-755-8835 3502/03/04 f ax :86-755-8835 3509 website:http://www.lizhiic.com shenzhen lize electronic technology co., ltd date: 1 5 , apr . 20 10 version: 2 . 0 page: 3 of 1 6 pin pin pin pin descriptions descriptions descriptions descriptions table 1: pin configuration pi pin designation type name and functions a0 - a2 i address inputs sda i/o & open-drain serial data scl i serial clock input wp i write protect gnd p ground vcc p power supply nc nc no connect n block block block block diagram diagram diagram diagram www.datasheet.co.kr datasheet pdf - http://www..net/
t el :86-755-8835 3502/03/04 f ax :86-755-8835 3509 website:http://www.lizhiic.com shenzhen lize electronic technology co., ltd date: 1 5 , apr . 20 10 version: 2 . 0 page: 4 of 1 6 pin pin pin pin descriptions descriptions descriptions descriptions device/page device/page device/page device/page addresses addresses addresses addresses (a2, (a2, (a2, (a2, a1 a1 a1 a1 and and and and a0): a0): a0): a0): the a2, a1 and a0 pins are device address inputs that are hard wired for the L24C02B . eight 2k devices may be addressed on a single bus system (device addressing is discussed in detail under the device addressing section). the l24c04 uses the a2 and a1 inputs for hard wire addressing and a total of four 4k devices may be addressed on a single bus system. the a0 pin is a no connect and can be connected to ground. the l24c08b only uses the a2 input for hardwire addressing and a total of two 8k devices may be addressed on a single bus system. the a0 and a1 pins are no connects and can be connected to ground. the l24c16 does not use the device address pins, which limits the number of devices on a single bus to one. the a0, a1 and a2 pins are no connects and can be connected to ground. serial serial serial serial data data data data (sda): (sda): (sda): (sda): the sda pin is bi-directional for serial data transfer. this pin is open-drain driven and may be wire-ored with any number of other open-drain or open- collector devices. serial serial serial serial clock clock clock clock (scl): (scl): (scl): (scl): the scl input is used to positive edge clock data into each eeprom device and negative edge clock data out of each device. write write write write protect protect protect protect (wp): (wp): (wp): (wp): the L24C02B /l24c04/ l24c08b /l24c16 has a write protect pin that provides hardware data protection. the write protect pin allows normal read/write operations when connected to ground (gnd). when the write protect pin is connected to vcc, the write protection feature is enabled and operates as shown in the following table 2. table 2: write protect wp pin status part of the array protected L24C02B l24c04 l24c08b l24c16 at vcc full (2k) array full (4k) array full (8k) array full (16k) array at gnd normal read/write operations memory memory memory memory organization organization organization organization L24C02B L24C02B L24C02B L24C02B , , , , 2k 2k 2k 2k serial serial serial serial eeprom: eeprom: eeprom: eeprom: internally organized with 32 pages of 8 bytes each, the 2k requires an 8-bit data word address for random word addressing. l24c04, l24c04, l24c04, l24c04, 4k 4k 4k 4k serial serial serial serial eeprom: eeprom: eeprom: eeprom: internally organized with 32 pages of 16 bytes each, the 4k requires a 9-bit data word address for random word addressing. l24c08b l24c08b l24c08b l24c08b , , , , 8k 8k 8k 8k serial serial serial serial eeprom: eeprom: eeprom: eeprom: internally organized with 64 pages of 16 bytes each, the 8k requires a 10-bit data word address for random word addressing. l24c16, l24c16, l24c16, l24c16, 16k 16k 16k 16k serial serial serial serial eeprom: eeprom: eeprom: eeprom: internally organized with 128 pages of 16 bytes each, the 16k requires an 11-bit data word address for random word addressing. device device device device operation operation operation operation clock clock clock clock and and and and data data data data transitions: transitions: transitions: transitions: the sda pin is normally pulled high with an external device. data on the sda pin may change only during scl low time periods (see to figure 1 on page 5 ). data changes during scl high periods will indicate a start or stop condition as defined below. www.datasheet.co.kr datasheet pdf - http://www..net/
t el :86-755-8835 3502/03/04 f ax :86-755-8835 3509 website:http://www.lizhiic.com shenzhen lize electronic technology co., ltd date: 1 5 , apr . 20 10 version: 2 . 0 page: 5 of 1 6 start start start start condition: condition: condition: condition: a high-to-low transition of sda with scl high is a start condition which must precede any other command (see to figure 2 on page 5 ). stop stop stop stop condition: condition: condition: condition: a low-to-high transition of sda with scl high is a stop condition. after a read sequence, the stop command will place the eeprom in a standby power mode (see figure 2 on page 5 ). acknowledge: acknowledge: acknowledge: acknowledge: all addresses and data words are serially transmitted to and from the eeprom in 8-bit words. the eeprom sends a "0" to acknowledge that it has received each word. this happens during the ninth clock cycle. standby standby standby standby mode: mode: mode: mode: the L24C02B /l24c04/ l24c08b /l24c16 features a low-power standby mode which is enabled: (a) upon power-up and (b) after the receipt of the stop bit and the completion of any internal operations . memory memory memory memory reset: reset: reset: reset: after an interruption in protocol, power loss or system reset, any two-wire part can be reset by following these steps: 1. clock up to 9 cycles. 2. look for sda high in each cycle while scl is high. 3. create a start condition. figure 1: data validity ? figure 2: start and stop definition www.datasheet.co.kr datasheet pdf - http://www..net/
t el :86-755-8835 3502/03/04 f ax :86-755-8835 3509 website:http://www.lizhiic.com shenzhen lize electronic technology co., ltd date: 1 5 , apr . 20 10 version: 2 . 0 page: 6 of 1 6 figure 3: output acknowledge device device device device addressing addressing addressing addressing the 2k, 4k, 8k and 16k eeprom devices all require an 8-bit device address word following a start condition to enable the chip for a read or write operation (see to figure 4 on page 8 ). the device address word consists of a mandatory "1", "0" sequence for the first four most significant bits as shown. this is common to all the serial eeprom devices. the next 3 bits are the a2, a1 and a0 device address bits for the 2k eeprom. these 3 bits must compare to their corresponding hardwired input pins. the 4k eeprom only uses the a2 and a1 device address bits with the third bit being a memory page address bit. the two device address bits must compare to their corresponding hardwired input pins. the a0 pin is no connect. the 8k eeprom only uses the a2 device address bit with the next 2 bits being for memory page addressing. the a2 bit must compare to its corresponding hard-wired input pin. the a1 and a0 pins are no connect. the 16k does not use any device address bits but instead the 3 bits are used for memory page addressing. these page addressing bits on the 4k, 8k and 16k devices should be considered the most significant bits of the data word address which follows. the a0, a1 and a2 pins are no connect. the eighth bit of the device address is the read/write operation select bit. a read operation is initiated if this bit is high and a write operation is initiated if this bit is low. upon a compare of the device address, the eeprom will output a "0". if a compare is not made, the chip will return to a standby state. write write write write operations operations operations operations byte byte byte byte write: write: write: write: a write operation requires an 8-bit data word address following the device address word and acknowledgment. upon receipt of this address, the eeprom will again respond with a "0" and then clock in the first 8-bit data word. following receipt of the 8-bit data word, the eeprom will www.datasheet.co.kr datasheet pdf - http://www..net/
t el :86-755-8835 3502/03/04 f ax :86-755-8835 3509 website:http://www.lizhiic.com shenzhen lize electronic technology co., ltd date: 1 5 , apr . 20 10 version: 2 . 0 page: 7 of 1 6 output a "0" and the addressing device, such as a microcontroller, must terminate the write sequence with a stop condition. at this time the eeprom enters an internally timed write cycle, t wr , to the nonvolatile memory. all inputs are disabled during this write cycle and the eeprom will not respond until the write is complete (see figure 5 on page 7). page page page page write: write: write: write: the 2k eeprom is capable of an 8-byte page write, and the 4k, 8k and 16k devices are capable of 16-byte page writes. a page write is initiated the same as a byte write, but the microcontroller does not send a stop condition after the first data word is clocked in. instead, after the eeprom acknowledges receipt of the first data word, the microcontroller can transmit up to seven (2k) or fifteen (4k, 8k, 16k) more data words. the eeprom will respond with a "0" after each data word received. the microcontroller must terminate the page write sequence with a stop condition (see figure 6 on page 8 ). the data word address lower three (2k) or four (4k, 8k, 16k) bits are internally incremented following the receipt of each data word. the higher data word address bits are not incremented, retaining the memory page row location. when the word address, internally generated, reaches the page boundary, the following byte is placed at the beginning of the same page. if more than eight (2k) or sixteen (4k, 8k, 16k) data words are transmitted to the eeprom, the data word address will "roll over" and previous data will be overwritten. acknowledge acknowledge acknowledge acknowledge polling: polling: polling: polling: once the internally timed write cycle has started and the eeprom inputs are disabled, acknowledge polling can be initiated. this involves sending a start condition followed by the device address word. the read/write bit is representative of the operation desired. only if the internal write cycle has completed will the eeprom respond with a "0", allowing the read or write sequence to continue. read read read read operations operations operations operations read operations are initiated the same way as write operations with the exception that the read/write select bit in the device address word is set to "1". there are three read operations: current address read, random address read and sequential read. current current current current address address address address read: read: read: read: the internal data word address counter maintains the last address accessed during the last read or write operation, incremented by one. this address stays valid between operations as long as the chip power is maintained. the address "roll over" during read is from the last byte of the last memory page to the first byte of the first page. the address "roll over" during write is from the last byte of the current page to the first byte of the same page. once the device address with the read/write select bit set to "1" is clocked in and acknowledged by the eeprom, the current address data word is serially clocked out. the microcontroller does not respond with an input "0" but does generate a following stop condition (see figure 7 on page 8). random random random random read: read: read: read: a random read requires a "dummy" byte write sequence to load in the data word address. once the device address word and data word address are clocked in and acknowledged by the eeprom, the microcontroller must generate another start condition. the microcontroller now initiates a current address read by sending a device address with the read/write select bit high. the eeprom acknowledges the device address and serially clocks out the data word. the microcontroller does not respond with a "0" but does generate a following stop condition (see figure 8 on page 9 ). sequential sequential sequential sequential read: read: read: read: sequential reads are initiated by either a current address read or a random address read. after the microcontroller receives a data word, it responds with an acknowledge. as www.datasheet.co.kr datasheet pdf - http://www..net/
t el :86-755-8835 3502/03/04 f ax :86-755-8835 3509 website:http://www.lizhiic.com shenzhen lize electronic technology co., ltd date: 1 5 , apr . 20 10 version: 2 . 0 page: 8 of 1 6 long as the eeprom receives an acknowledge, it will continue to increment the data word address and serially clock out sequential data words. when the memory address limit is reached, the data word address will "roll over" and the sequential read will continue. the sequential read operation is terminated when the microcontroller does not respond with a "0" but does generate a following stop condition (see figure 9 on page 9 ). ? figure 4: device address ? figure 5: byte write ? figure 6: page write ? figure 7: current address read www.datasheet.co.kr datasheet pdf - http://www..net/
t el :86-755-8835 3502/03/04 f ax :86-755-8835 3509 website:http://www.lizhiic.com shenzhen lize electronic technology co., ltd date: 1 5 , apr . 20 10 version: 2 . 0 page: 9 of 1 6 ? figure 8: random read ? figure 9: sequential read electrical electrical electrical electrical characteristics characteristics characteristics characteristics ? absolute absolute absolute absolute maximum maximum maximum maximum stress stress stress stress ratings ratings ratings ratings dc supply voltage . . . . . . . . . . . . . . . . .-0.3v to +6.5v input / output voltage . . . . . . . .gnd-0.3v to v cc +0.3v operating ambient temperature . . . . . -40 to +85 storage temperature . . . . . . . . . . . . -65 to +150 ? comments comments comments comments stresses above those listed under "absolute maximum ratings" may cause permanent damage to this device. these are stress ratings only. functional operation of this device at these or any other conditions above those indicated in the operational sections of this specification is not implied or intended. exposure to the absolute maximum rating conditions for extended periods may affect device reliability. www.datasheet.co.kr datasheet pdf - http://www..net/
t el :86-755-8835 3502/03/04 f ax :86-755-8835 3509 website:http://www.lizhiic.com shenzhen lize electronic technology co., ltd date: 1 5 , apr . 20 10 version: 2 . 0 page: 10 of 1 6 dc dc dc dc electrical electrical electrical electrical characteristics characteristics characteristics characteristics applicable over recommended operating range from: ta = -40 to +85 , vcc = +1.8v to +5.5v (unless otherwise noted) parameter symbol min. typ. max. unit condition supply voltage vcc 1.8 - 5.5 v supply current vcc=5.0v icc1 - 0.4 1.0 ma read @100khz supply current vcc=5.0v icc2 - 2.0 3.0 ma write @100khz standby current i sb - - 1.0 ua vin=vcc or gnd input leakage current i li - - 3.0 ua vin=vcc or gnd output leakage current i lo - 0.05 3.0 ua vout=vcc or gnd input low level v il -0.6 - vcc 0.3 v input high level v ih vcc 0.7 - vcc + 0.5 v output low level vcc=5.0v v ol3 - - 0.4 v i ol =3.0ma output low level vcc=3.0v v ol2 - - 0.4 v i ol =2.1ma output low level vcc=1.8v v ol1 - - 0.2 v i ol =0.15ma pin pin pin pin capacitance capacitance capacitance capacitance applicable over recommended operating range from ta = 25 , f = 1.0 mhz, vcc = +1.8v parameter symbol min. typ. max. unit condition input/output capacitance (sda) c i/o - - 8 pf v i/o = 0v input capacitance (a0, a1, a2, scl) c in - - 6 pf v in = 0v ac ac ac ac electrical electrical electrical electrical characteristics characteristics characteristics characteristics applicable over recommended operating range from ta = -40 to +85 , vcc = +1.8v to +5.5v, cl = 1 ttl gate and 100 pf (unless otherwise noted) parameter symbol 1.8-volt 5.0-volt units min . typ. max. min. typ. max. clock frequency, scl f scl - - 400 - - 1000 khz clock pulse width low t low 1.2 - - 0.6 - - u s clock pulse width high t high 0.6 - - 0.4 - - u s noise suppression time t i - - 50 - - 40 u s clock low to data out valid t aa 0.05 - 0.9 0.05 - 0.55 u s time the bus must be free before a new transmission can start t buf 1.2 - - 0.5 - - u s start hold time t hd.sta 0.6 - - 0.25 - - u s start setup time t su.sta 0.6 - - 0.25 - - u s data in hold time t hd.dat 0 - - 0 - - u s data in setup time t su.dat 100 - - 100 - - n s in puts rise time(1) t r - - 0.3 - - 0.3 u s inputs fall time(1) t f - - 300 - - 100 n s stop setup time t su.sto 0.6 - - 0.25 - - u s data out hold time t dh 50 - - 50 - - n s write cycle time t wr - - 5 - - 5 ms 5.0v, 25 , byte mode endurance 1m - - - - - write cycles www.datasheet.co.kr datasheet pdf - http://www..net/
t el :86-755-8835 3502/03/04 f ax :86-755-8835 3509 website:http://www.lizhiic.com shenzhen lize electronic technology co., ltd date: 1 5 , apr . 20 10 version: 2 . 0 page: 11 of 1 6 note 1. this parameter is characterized and is not 100% tested. 2. ac measurement conditions: rl (connects to vcc): 1.3 k (2.5v, 5v), 10 k (1.8v) input pulse voltages: 0.3 vcc to 0.7 vcc input rise and fall time: 50 ns input and output timing reference voltages: 0.5 vcc the value of rl should be concerned according to the actual loading on the user's system. bus bus bus bus timing timing timing timing figure 10: scl: serial clock, sda: serial data i/o write write write write cycle cycle cycle cycle timing timing timing timing ? figure 11: scl: serial clock, sda: serial data i/o note 1. the write cycle time t wr is the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle. www.datasheet.co.kr datasheet pdf - http://www..net/
t el :86-755-8835 3502/03/04 f ax :86-755-8835 3509 website:http://www.lizhiic.com shenzhen lize electronic technology co., ltd date: 1 5 , apr . 20 10 version: 2 . 0 page: 12 of 1 6 ordering ordering ordering ordering information information information information code code code code number number number number part number l l l l 24 24 24 24 xxx xxx xxx xxx x x x x - - - - x x x x x x x x 1 2 3 4 5 1.prefix 1.prefix 1.prefix 1.prefix 2.series 2.series 2.series 2.series name name name name 24:two-wire(i2c) interface 3.eeprom 3.eeprom 3.eeprom 3.eeprom density density density density c02 b =2k bits c04=4k bits 4.package 4.package 4.package 4.package type type type type d=dip s=sop t=tssop 5.temperature 5.temperature 5.temperature 5.temperature range range range range i=ind temp(-40 -85 ) e=exp temp(-40 -125 ) c08 b =8k bits c16=16k bits www.datasheet.co.kr datasheet pdf - http://www..net/
t el :86-755-8835 3502/03/04 f ax :86-755-8835 3509 website:http://www.lizhiic.com shenzhen lize electronic technology co., ltd date: 1 5 , apr . 20 10 version: 2 . 0 page: 13 of 1 6 packaging packaging packaging packaging information information information information 1.tssop 1.tssop 1.tssop 1.tssop 2.dfn 2.dfn 2.dfn 2.dfn www.datasheet.co.kr datasheet pdf - http://www..net/
t el :86-755-8835 3502/03/04 f ax :86-755-8835 3509 website:http://www.lizhiic.com shenzhen lize electronic technology co., ltd date: 1 5 , apr . 20 10 version: 2 . 0 page: 14 of 1 6 3 3 3 3 .sop .sop .sop .sop ` symbol millimeter min nom max a 1.77 a1 0.08 0.18 0.28 a2 1.20 1.40 1.60 a3 0.55 0.65 0.75 b 0.39 0.48 b1 0.38 0.41 0.43 c 0.21 0.26 c1 0.19 0.20 0.21 d 4.70 4.90 5.10 e 5.80 6.00 6.20 e1 3.70 3.90 4.10 e 1.27bsc l 0.50 0.65 0.80 l1 1.05bsc 0 8 www.datasheet.co.kr datasheet pdf - http://www..net/
t el :86-755-8835 3502/03/04 f ax :86-755-8835 3509 website:http://www.lizhiic.com shenzhen lize electronic technology co., ltd date: 1 5 , apr . 20 10 version: 2 . 0 page: 15 of 1 6 4 4 4 4 .sot23-5 .sot23-5 .sot23-5 .sot23-5 www.datasheet.co.kr datasheet pdf - http://www..net/
t el :86-755-8835 3502/03/04 f ax :86-755-8835 3509 website:http://www.lizhiic.com shenzhen lize electronic technology co., ltd date: 1 5 , apr . 20 10 version: 2 . 0 page: 16 of 1 6 5 5 5 5 . . . . dip dip dip dip symbol millimeter min nom max a 3.60 3.80 4.00 a1 0.51 a2 3.10 3.30 3.50 a3 1.50 1.60 1.70 b 0.44 0.53 b1 0.43 0.46 0.48 b1 1.52bsc c 0.25 0.31 c1 0.24 0.25 0.26 d 9.05 9.25 9.45 e1 6.15 6.35 6.55 e 2.54bsc ea 7.62bsc eb 7.62 9.50 ec 0 0.94 l 3.00 www.datasheet.co.kr datasheet pdf - http://www..net/

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